The invention relates generally to semiconductor-on-insulator (SOI) devices and methods for forming the same. The invention relates particularly to an SOI device having structure to reduce floating body effects by enhancing carrier recombination and a method for fabricating the SOI device.
Traditional semiconductor-on-insulator (SOI) integrated circuits typically have a silicon substrate having a buried oxide (BOX) layer disposed thereon. A semiconductor active layer, typically made from silicon, is disposed on the BOX layer. Within the active layer, active devices, such as transistors, are formed in active regions. The size and placement of the active regions are defined by isolation regions. As a result of this arrangement, the active devices are isolated from the substrate by the BOX layer. More specifically, a body region of each SOI transistor does not have body contacts and is therefore xe2x80x9cfloating.xe2x80x9d
SOI chips offer potential advantages over bulk chips for the fabrication of high performance integrated circuits for digital circuitry. Such digital circuitry is typically made from partially-depleted metal oxide semiconductor field effect transistors (MOSFETs). In such circuits, dielectric isolation and reduction of parasitic capacitance improve circuit performance, and virtually eliminate latch-up in CMOS circuits. In addition, circuit layout in SOI can be greatly simplified and the packing density greatly increased.
However, devices formed from SOI materials typically exhibit parasitic effects due to the presence of the floating body (i.e., xe2x80x9cfloating body effectsxe2x80x9d). These floating body effects may result in undesirable performance in SOI devices. Therefore, it will be appreciated that a need exists for SOI devices having reduced floating body effects.
According to one aspect of the invention, the invention is a semiconductor-on-insulator (SOI) device. The SOI device includes an SOI wafer including an active layer, a substrate and a buried insulation layer disposed therebetween, the active layer having isolation regions defining an active region, and a source region, a drain region and a body region disposed therebetween being formed in the active region; a gate disposed on the semiconductor layer above the body region, the gate being operatively arranged with the source, drain and body regions to form a transistor; and wherein the active layer includes an abrupt region disposed along a lower portion of the active layer, the abrupt region having the same P or N doping type as a doping type of the body region.
According to another aspect of the invention, the invention is a method for forming a semiconductor-on-insulator (SOI) device. The method includes the steps of providing an SOI wafer having an active layer, a substrate and a buried insulation layer disposed therebetween; forming isolation regions within the active layer to define an active region; forming a source region, a drain region and a body region disposed therebetween within the active region; forming an abrupt region disposed along a lower portion of the active layer, the abrupt region having the same P or N doping type as a doping type of the body region; and forming a gate disposed on the semiconductor layer above the body region, the gate being operatively arranged with the source, drain and body regions to form a transistor.